| dc.contributor.author | Bambang Sujanarko | |
| dc.date.accessioned | 2014-10-31T01:44:07Z | |
| dc.date.available | 2014-10-31T01:44:07Z | |
| dc.date.issued | 2014-10-31 | |
| dc.identifier.issn | 0975 8887 | |
| dc.identifier.uri | http://repository.unej.ac.id/handle/123456789/59810 | |
| dc.description.abstract | Cascaded multilevel inverter (CMLI) is emerging as a new
breed of power converter options for high-power
applications. Various topologies and modulation strategies
of this inverter has been proposed. In this paper, Matlab
simulink of CMLI using Carrier Based Pulse Width
Modulation (CBPWM) techniques is developed to get
optimum design and performances. Some parameter of this
Simulink model can be varied, so some interesting
characteristics of the inverter can be optimized. A
simulation result shows that the system is easy and modular
to adjust, and optimum performances can improve. | en_US |
| dc.language.iso | en | en_US |
| dc.subject | cascaded multilevel inverter, carrier based pulse width modulation, frequency, total harmonic distortion | en_US |
| dc.title | Simulation Development of Carrier based Pulse Width Modulation for Cascaded Multilevel Inverter | en_US |
| dc.type | Other | en_US |
